Wednesday, 22 June 2005
The 2005
International Conference on
Engineering
of Reconfigurable Systems and Algorithms
LOCATION: Meeting Room 1
Note: There are a number of other
sessions (not listed as part of ERSA'05 schedule) that are of significant
interest to ERSA conference participants (sessions belonging to other joint
conferences in this event.) Therefore,
you are encouraged to also check the schedules for other joint
conferences. In particular, some
sessions in PDPTA'05 and CDES'05, discuss topics that are within the scope of
ERSA; these have been scheduled so that ERSA attendees can also participate in
them.
ERSA’05
Conference
LOCATION: Meeting Room 1
Toomas P Plaks (ERSA Chair)
LSBU,
Enabling Killer Applications of Reconfigurable
Systems. ERSA'05 Introduction
Donald Bouldin
SESSION 1-ERSA: Energy-Efficient reconfigurable mobile systems
Gerard J.M. Smit
Reconfigurable Architectures for Adaptable Mobile
Systems
Gerard J. M. Smit, Gerard K. Rauwerda
Reconfigurable Instruction Set Computing for
Embedded Processing
Stretch,
Inc.,
Jing Ma and Xinming Huang
Kimmo Jarvinen, Matti Tommiska, and Jorma Skytta
Jingzhao Ou and Viktor K. Prasanna
Gerard K. Rauwerda*, Gerard J. M. Smit*, and Werner
Brugger**
*
**Atmel
Germany
TUTORIAL 0:
Speaker: Dr. Mark Stamp
(Author of Textbook, Information
Security: Principles & Practice)
(LOCATION: Meeting Room 6)
(LOCATION: Meeting Rooms 1-5)
LOCATION: Meeting Room 1
SESSION 3-ERSA: Reconfigurable Supercomputing
Chair:
Maya B. Gokhale,
Co-Chair: Toomas P. Plaks,
Toomas
P. Plaks
B. P. Thurmon, J. M. McCollum, G. D. Peterson, C. D.
Cox, N. F. Samatova, G. S. Sayler, and
M. L. Simpson
Sanjay Rajopadhye* and Kolin Paul**
*
**Indian
Institute of Technology,
Area-Efficient
Evaluation of Arithmetic Expressions Using Deeply Pipelined Floating-Point
Cores
Ronald Scrofano, Ling Zhuo, and Viktor K. Prasanna
Session 3-ERSA continuous
The
Design And Application Of A High-End Reconfigurable Computing System
Chen Chang, John Wawrzynek, Pierre-Yves Droz, and
Robert W. Brodersen
A
Library of Parameterizable Floating-Point Cores for FPGAs and Their Application
to Scientific Computing
Gokul Govindu, Ronald Scrofano, and Viktor K. Prasanna
Configurable Processors and the Evolution of
System-on-Chip Design
Dror E. Maydan
Tensilica,
Inc.,
SESSION
6-ERSA: Adaptive Architectures and
Applications
Chair: Steven A. Guccione, Cmpware, Inc.
Steven A. Guccione
Chuan He,
Wei Zhao, and Mi Lu
Texas A&M university,
02:15 - 02:35pm: CliffoSor, an
Innovative FPGA-based Architecture for Geometric Algebra
A. Gentile, S. Segreto,
F. Sorbello, G. Vassallo, S. Vitabile, and V. Vullo
Univ.
Degli studi di Palermo, Italy
Why the automotive market requires configurable
computing?
John Watson
ElementCXI,
Inc.,
03:05 -- 03:25pm: COFFEE BREAK
Session 6-ERSA continuous
Peter Athanas*, Josh Edmison*, Jonathan
Graf**, Alan Jamison**, Mark Jones*, Tony Mahar*, Ben Muzal*, Cameron
Patterson*, Barry Polakowski**, and Justin Stroud
*
**Luna Innovations,
Wim J. C. Melis*, Kieron Turkington, Alexander Whitton, Wayne Luk, and
Peter Y. K. Cheung
Shigeru Yamashita
Nara Institute of
Science and
I.
Demo
O. Accelerating
Compute Intensive Functions Using “C” and Software-Configurable Processors
Joe Hanson
Stretch, Inc.,
II. Discussion Session. Short papers
O.
A Reconfigurable Antialiasing Filter
Design Using Multi-Abstraction Design Exploration Approach
Otsebele Nare* and Charles Johnson-Bey
O. Data
Partitioning for Reconfigurable Architectures with Distributed Block RAM
Wenrui Gong, Yan Meng, Gang Wang, Ryan Kastner* and Timothy
Sherwood
O. Instance-Specific
Versus Parameter-Specific Circuit Generation
Jacqueline E. Rice** and Kenneth B. Kent*
*
**
O. Application
Specific Reconfigurable Architecture Design Methodology
Ali Akoglu* and Sethuraman
Panchanathan
O. Architecture
of Reconfigurable Algorithms
Luís F. W. Góes *, Milene B. Carvalho, Luiz E. S. Ramos, Christiane
V. Pousa, and Carlos A. P. S. Martins
Pontifical Catholic
O. A
Device-Controlled Dynamic Configuration Framework Supporting Heterogeneous
Resource Management
H. Tan* and R. F. DeMara
O. Algorithms
for Scheduling of Data Transfer Across FPGAs in a Grid
Janak Porwal* and Sachin Patkar
Indian
O. A
Multi-Pattern Scheduling Algorithm
Yuanqing Guo*, Cornelis Hoede, and Gerard J.M. Smit
III. Discussion Session. Posters
O. SysteMorph:
An SoC Framework for Adaptive Dynamic Optimization Systems
Hamid Noori*, Kazuhito Eshima, Yousuke Fujii, Makoto Yoshida,
Takeshi Soga, Norifumi Yoshimatsu, and Kazuaki Murakami
O. A Fast
Timing-Driven Router for Island-Style FPGAs
Jean-Pierre Diei* and Soheil Ghiasi
O. Compiling
Stream-Language Applications to a Reconfigurable Array Processor
Zain-ul-Abdin* and Bertil Svensson
O. Design
and Implementation of a Reconfigurable Computing System Environment and IP
Cores for Image Processing
Fang-Hsi
Kuo*, Yang-Tzu Fan, Chia-Cheng Liu
Jin Wen Institute of technology,
O. A
Non-Linear Function Generator Using BRM
Youngsoo Kim
NSRI,
O. Application-Specific
Partitioning Algorithm for Run-Time Reconfigurable Platform for Embedded
Devices
Krishnamoorthy Baskaran
CHiPES, NTU,
O. Abstract
Synthesis of Turbo Decoder Elements onto Reconfigurable Circuit
Caaliph Andriamisina, Catherine Dezan*, and Christophe Jego
UBO, LESTER, France
O. JRAS:
An Efficient Compilation Tool for Reconfigurable Computing Systems
Christopher C. Doss*, John Kelly, Jr.*, and Robert L. Riley, Jr.**
*
**Air Force Research
O. Hardware
Join Java and the Formal Verification of the Compilation of Reconfigurable
Computing Programs
John Hopf* and David Kearney
06:05 - 09:30pm: Two (planned)
Tutorials (concurrent sessions):
TUTORIAL 1:
Parallel
and Distributed Heterogeneous Computing Systems
Speaker: Prof. H. J. Siegel,
(LOCATION: Meeting Room 1)
TUTORIAL 2:
Grid
Computing: Making the Global Cyberinfrastructure for eScience and eBusiness a
Reality
Speaker: Dr. Rajkumar Buyya,
(LOCATION: Meeting Room 2)
LOCATION: Meeting Room 1
SESSION 2-ERSA: Operating System Approaches for Reconfigurable Hardware
Chair:
Marco Platzner,
Co-Chair:
Frank Hannig,
Frank Hannig
Fei Wang, Jack Jean, and Shuxia Sun
Frank Hannig and Jürgen Teich
Stefan Ihmor and Florian Dittmann
Heinz
Nixdorf Institute, University
Defragmenting
the Module Layout of a Partially Reconfigurable Device
Jan C. van der Veen*, Sándor P. Fekete*, Mateusz Majer**,
Ali Ahmadinia**, Christophe Bobda**, and Jürgen Teich**
*Braunschweig
University of Technology,
**
SESSION 4-ERSA: Reconfigurable System-On-Chip and HW/SW Codesign
Chairmen:
Michael J. Wirthlin, Brigham
Toomas
P. Plaks
Xuejun Liang*, Jeffrey S. Vetter**, Melissa C. Smith**,
and Arthur S. Bland**
*
**
Steven A. Guccione
Cmpware,
Inc.,
Session
4-ERSA continuous
What's the Future of C-Based Programmable SoC
design?
Jeff Jussel
Celoxica,
Inc.,
Sherif Yusuf*, Wayne Luk*, and Geoffrey Brown**
*
**
An
Operation and Interconnection Sharing Algorithm for Partially Reconfigurable
Architectures
Sungjoon Jung and Tag Gon Kim
KAIST,
SESSION 5-ERSA: Runtime Resource Management
Chair:
Ronald F. DeMara,
Co-Chair:
Abdel Ejnioui,
Ronald F. DeMara
Ryan A. DeVille, Ian Troxel, and Alan George
Zexin Pan*, Juanjo Noguera**, and B. Earl Wells*
*
**Hewlett-Packard
Inkjet Commercial Division,
Yana Esteves Krasteva, Ana Belen Jimeno, Eduardo de la
Torre, and Teresa Riesgo
Universidad
Abdel Ejnioui and Ronald F. DeMara
Toomas P Plaks
TUTORIAL 3:
Speaker: Dr. Sub Ramakrishnan,
(LOCATION: Meeting Room 1)
that are of significant interest to ERSA conference
participants (sessions belonging to other joint
conferences
in this event.) You are encouraged to check the
schedules
for other joint conferences (in particular, schedules
for
PDPTA'05 and CDES'05).